A series of processes for forming a desired resist pattern by coating a substrate for forming a semiconductor devices or a LCD substrate with a resist solution, exposing a resist film to light through a photomask and developing the exposed resist film is carried out by a system built by connecting an exposure system to a coating and developing system for resist solution application and development.
The coating and developing system is formed by arranging in a line a carrier station provided with a transfer arm for receiving a semiconductor wafer (hereinafter, referred to simply as “wafer”) from and delivering a wafer to a wafer carrier placed in the carrier station, a processing station for processing a wafer by a coating process and a developing process, and an interface station.
A substrate provided with a resist pattern is inspected by a predetermined inspection procedure for matters including the line width of the resist pattern, registration of the resist patter with a base pattern and development defects. Only the acceptable substrates passed the inspection are sent to the next process. In most cases, the inspection procedure is carried out by a stand-alone inspection apparatus separate from the coating and developing system. It is more convenient to carry out the inspection procedure by an inline inspection system incorporated into the coating and developing system.
An arrangement mentioned in Patent document 1 includes an inspection station provided with a plurality of inspection devices and a carrying arm and interposed between a carrier station and a processing station. A system mentioned in Patent document 1 carries a substrate from the carrier station through the inspection station to the processing station, returns a completely processed substrate to a carrier placed in the carrier station, and then, the substrate is carried from the carrier to the inspection station for inspection.
FIG. 19 shows the actual arrangement of this system. FIG. 19 is a schematic plan view of a coating and developing system. Shown in FIG. 19 are a carrier station 11, an inspection station 12, a processing station 13, an interface station 14 connected to an exposure system, carriers 20, a transfer arm 15 installed in the carrier station 11, and a carrying arm 16 installed in the inspection station. Indicated by TRSa, TRSb, TRSc and TRSd are transfer modules, and indicated by E1, E2 and E3 are inspection modules. Those modules are arranged in a plane for convenience in FIG. 19. Actually, the transfer modules are stacked, for example, in four layers and the inspection modules are stacked, for example, in three layers.
In the coating and developing system in the first embodiment, a wafer contained in the carrier 20 is carried from the carrier 20 via the transfer arm 15, the TRSa, and the carrying arm 16 to the processing station 13. The wafer is processed by necessary processes by the modules of the processing station 13 and is transferred through the interface station 14 to an exposure system. Then, the wafer is returned from the exposure system to the processing station 13 and the wafer is processed by processes necessary for developing by the modules of the processing station 13. The wafer thus processed is returned from the processing station 13 via the carrying arm 16, the TRSb and the transfer arm 15 to the carrier 20.
Wafers contained in the carrier 20 are processed in due order. For example, when twenty-five wafers are contained in the carrier 20, numbers 1 to 25 are assigned to those wafers. First, the wafer No. 1 is carried to the processing station 13 and is carried to the predetermined modules in sequence. The carrying arm, namely, the main arm, of the processing station 13 carries the wafer by a cyclic carrying operation to a predetermined series of modules in sequence. The main arm uses two arms for changing a wafer in the module. Suppose that a carrying path along which the main arm carries a wafer is called a circulation path. Then, the carrying arm moves once along the circulation path in a predetermined cycle time. The carrying arm does not make operations to move back and to carry a wafer of a larger number, namely a wafer taken out of the carrier 20 later skipping a wafer of a smaller number, namely, a wafer taken out of the carrier 20 earlier. Those operations are inhibited because those operations are actually infeasible and complicate a carrying program. In recent years, the coating and developing system is required to process 150 wafers per hour. Therefore, the cycle time for the cyclic carrying operation is, for example, 24 s=3600 s/150.
All of the wafers returned to the carrier 20 or some chosen ones of the wafers returned to the carrier 20 are transferred to the transfer module TRSc by the transfer arm 15. The carrying arm 16 carries the wafers to the inspection modules. For example, some of the wafers are inspected only by the inspection module E1, some of the wafers are inspected only by the inspection module E2, some of the wafers are inspected only by the inspection module E3 and some of the wafers are inspected by the inspection module E2 and the inspection module E3 in sequence. Wafers are carried in the inspection station 12 by a cyclic carrying operation similar to that by which wafers are carried in the processing station in synchronism with the latter cyclic carrying operation.
When wafers are carried by the foregoing cyclic carrying operation, the transfer arm 15 needs to execute many carrying steps. The transfer arm 15 cannot carry a wafer to the carrier 20 while the same is in operation to carry a wafer to the inspection station 12 and the transfer arm 15 cannot carry a wafer to the inspection station 12 while the same in operation to carry a wafer to the carrier 20. Therefore, a state in which a wafer is obliged to be held in the module of each station for a time corresponding to one cycle or longer, which reduces the throughput.
The inspection modules E1 to E3 execute different inspections, respectively, and different inspections take different inspection times, respectively. Suppose that a wafer is to be inspected by the inspection modules E1 and E2 in that order. When the inspection of the wafer by the inspection module E1 is completed, the inspection module E2 is engaged in inspecting another wafer. Therefore, the wafer cannot be carried from the inspection module E1 to the inspection module E2 and is obliged to be held in the inspection module E1 until the inspection of another wafer by the inspection module E2 is completed. A succeeding wafer cannot be carried to the inspection module E1 during a cycle in which the wafer is held in the inspection module E1 and, consequently, it is possible that the throughput decreases.
A coating and developing system mentioned in Patent document 2 has a carrier station, a processing station and an inspection station interposed between the carrier and the processing station, and carries a wafer to the processing station, the inspection station and the carrier station in that order. However, this coating and developing system cannot solve the foregoing problems and it is possible that wafers are obliged to be held in inspection modules because of different inspection times taken by inspection modules.
Patent document 1: IP 2005-175052 A (Par. 0042, FIG. 4)
Patent document 2: JP 2002-26107 A (Par. 0045)